Quasi-peak detection systems and methods
US10359459B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 13, 2017 |
| Grant date | Jul 23, 2019 |
| Priority date | — |
| Expiry date | Jul 16, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R29/0814
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Generally, in accordance with the various illustrative embodiments of the invention, a signal analyzer can incorporate a quasi-peak detection circuit that includes a detector diode. The detector diode is reverse-biased by using a direct-current (DC) voltage source. In some exemplary implementations, the DC bias voltage is defined on the basis of a predicted DC voltage at an output node of the quasi-peak detection circuit in response to a noise level contribution of the signal analyzer when the detector diode is unbiased. A signal is propagated through the quasi-peak detection circuit after the detector diode is reverse-biased, followed by a noise floor adjustment procedure. The noise floor adjustment procedure includes an adjustment directed at least in part, at compensating for the DC bias voltage that is used to reverse-bias the detector diode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.