Standing and resonant wave clocking in DDR RCD and data buffer
US10360970B1 · kind B1 · utility
2Cited by
0References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 19, 2018 |
| Grant date | Jul 23, 2019 |
| Priority date | — |
| Expiry date | Mar 19, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/222
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a plurality of termination points and a clock mesh network. The termination points may be configured to send/receive timing signals. Each of the termination points may comprise an inductor. The clock mesh network may be configured to provide a path to transmit the timing signals from a clock source to a plurality of components and implement a condition using the inductors. The inductors for each of the termination points may be implemented to meet the condition. Values for the inductors may be determined based on characteristics of the clock mesh network. The condition may prevent power loss.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.