Multi-level power factor correction circuit using hybrid devices
US10361626B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2018 |
| Grant date | Jul 23, 2019 |
| Priority date | — |
| Expiry date | Jun 13, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
AC to DC converters, more specifically Power Factor Correction (PFC) circuits, using a multi-level waveform and hybrid devices are presented. From an AC voltage input a multi-level waveform is generated, which is used to generate high and low DC output voltage levels. The multi-level waveform is connected to the DC outputs through a corresponding intermediate node by an initial switch, and from the intermediate node to the corresponding output by a hybrid device. The hybrid device includes a first current path, such as a series connected switch-diode pair, in parallel with second current path of a relatively faster and lower current device, such as a diode. The resultant arrangement can use devices having lower voltage ratings relative to typical PFC circuit designs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.