Data processing device and data processing method for improving resistance to error of data
US10361724B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 2018 |
| Grant date | Jul 23, 2019 |
| Priority date | — |
| Expiry date | May 4, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/152
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A data processing device and a data processing method capable of improving resistance to error of data. An LDPC encoder encodes by an LDPC code whose code length is 16200 bits and code rate is 4/15, 7/15, or 8/15. A parity check matrix of the LDPC code is composed by arrangement of an element of an information matrix determined by a parity check matrix initial value table indicating a position of the element of the information matrix corresponding to an information length corresponding to the code length and the code rate for each 360 columns of the parity check matrix with a period of 360 columns in a column direction. The parity check matrix initial value table is for digital broadcasting for a mobile terminal, for example. This technology may be applied to a case in which LDPC encoding and LDPC decoding are performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.