Automated testing error assessment system
US10365962B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 11, 2016 |
| Grant date | Jul 30, 2019 |
| Priority date | — |
| Expiry date | Nov 11, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L41/0654
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems for automatically resolving computerized electronic communication anomalies are disclosed herein. The system can include a memory including an error database containing information identifying a plurality of previous detected errors and configuration information associated with those errors. The system can include a plurality of user devices. Each of these plurality of user devices can include: a first network interface to exchange data via the communication network; and a first I/O subsystem to convert electrical signals to user interpretable outputs via a user interface. The system can include a server that can: receive an indication of the initiation of electronic communication; receive an electrical signal including attribute information; receive an error message; identify a trend in error messages; and provide an error solution if a trend is identified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.