Semiconductor device and manufacturing method thereof
US10366956B2 · kind B2 · utility
9Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2015 |
| Grant date | Jul 30, 2019 |
| Priority date | — |
| Expiry date | Jul 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/143
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes an integrated circuit, at least one outer seal ring, and at least one inner seal ring. The outer seal ring surrounds the integrated circuit. The outer seal ring includes a plurality of metal layers in a stacked configuration, and the metal layers are closed loops. The inner seal ring is disposed between the outer seal ring and the integrated circuit and separated from the outer seal ring. The inner seal ring has at least one gap extending from a region encircled by the inner seal ring to a region outside the inner seal ring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.