Semiconductor device including a semiconductor sheet interconnecting a source region and a drain region
US10367063B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jul 12, 2017 |
| Grant date | Jul 30, 2019 |
| Priority date | — |
| Expiry date | Jul 12, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0149
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device includes a substrate, a first source/drain (S/D) region, a second S/D region, and a semiconductor sheet. The first S/D region is disposed on the substrate. The second S/D region is disposed above the first S/D region. The semiconductor sheet interconnects the first and second S/D regions and includes a plurality of turns. A method for fabricating the semiconductor device is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.