Method and system for split voltage domain transmitter circuits
US10367664B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2017 |
| Grant date | Jul 30, 2019 |
| Priority date | — |
| Expiry date | May 29, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/4242
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Methods and systems for split voltage domain transmitter circuits are disclosed and may include a two-branch output stage including a plurality of CMOS transistors, each branch of the two-branch output stage comprising two stacked CMOS inverter pairs from among the plurality of CMOS transistors; the two stacked CMOS inverter pairs of a given branch being configured to drive a respective load, in phase opposition to the other branch; and a pre-driver circuit configured to receive a differential modulating signal and output, to respective inputs of the two stacked CMOS inverters, two synchronous differential voltage drive signals having a swing of half the supply voltage and being DC-shifted by half of the supply voltage with respect to each other. The load may include a series of diodes that are driven in differential mode via the drive signals. An optical signal may be modulated via the diodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.