Microcell interconnection in silicon photomultipliers
US10371835B2 · kind B2 · utility
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4Claims
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Key dates
| Filing date | Jan 11, 2016 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Jan 11, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/189
- WIPO fieldEnvironmental technology
- WIPO sectorChemistry
Abstract
A silicon photomultiplier array including a plurality of microcells arranged in rows and columns. A plurality of circuit traces connecting microcell output ports to the array pixel output port, with one or more impedance matching networks connected to at least one of the circuit traces. The impedance matching networks can be connected between each row circuit trace and the pixel output port. Impedance matching networks can be located between junctions of adjacent microcell output ports and row circuit traces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.