Methods and apparatus for read disturb detection and handling
US10373695B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2016 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Mar 8, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the disclosure provide methods and apparatus for handling Read Disturb and block errors in a non-volatile memory (NVM) device. An error level of both an aggressor page that causes Read Disturb errors and an error level of adjacent victim pages are obtained. The error level of the victim page is compared against a predetermined threshold error level to determine if the victim page is experiencing a high level of bit errors. If so, then the error level of the aggressor page is compared to the error level of the victim page to determine whether Read Disturb errors are actually occurring due to host reads of the aggressor page. By looking at both the aggressor and victim error levels, a more accurate determination of Read Disturb errors may be obtained, resulting in less unnecessary relocations of pages and blocks within an NVM for mitigating Read Disturb effects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.