Semiconductor device including contact structure
US10373961B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2018 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Jan 31, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes first wiring line patterns on a support layer, second wiring line patterns on the first wiring line patterns, and a multiple insulation pattern. The first wiring line patterns extend in a first direction and are spaced apart from each other in a second direction. The support layer includes first contact hole patterns between the first wiring line patterns that are spaced apart from each other in the first and second directions. The second wiring line patterns extend in the second direction perpendicular and are spaced apart from each other in the first direction. The multiple insulation pattern is on an upper surface of the support layer where the first contact hole patterns are not formed, arranged in a third direction perpendicular to the first direction and the second direction, and between the first wiring line patterns and the second wiring line patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.