Field-effect semiconductor device having N and P-doped pillar regions
US10374032B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2018 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Apr 4, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor body having first and second opposite sides, a drift region, a body layer at the second side, and a field-stop region in Ohmic connection with the body layer. A source metallization at the second side is in Ohmic connection with the body layer. A drain metallization at the first side is in Ohmic connection with the drift region. A gate electrode at the second side is electrically insulated from the semiconductor body to define an operable switchable channel region in the body layer. A through contact structure extends at least between the first and second sides, and includes a conductive region in Ohmic connection with the gate electrode and a dielectric layer. In a normal projection onto a horizontal plane substantially parallel to the first side, the field-stop region surrounds at least one of the drift region and the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.