Patent · US Active

Latch-up resistant transistor

US10374056B2 · kind B2 · utility

2Cited by

5References

20Claims

0Family size

Assignee

Infineon Technologies Austria AG · AT

Inventors

Katarzyna Kowalik-Seidl · Munich, DE
Bjoern Fischer · Munich, DE
Winfried Kaindl · Unterhaching, DE
Markus Schmitt · Neubiberg, DE
Matthias Wegscheider · Villach, AT

Key dates

Filing date	Oct 28, 2016
Grant date	Aug 6, 2019
Priority date	—
Expiry date	Nov 15, 2036

Classification

Technology area (CPC H)Electricity
CPC primaryH10D62/393
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Disclosed is a method for producing a transistor device and a transistor device. The method includes: forming a source region of a first doping type in a body region of a second doping type in a semiconductor body; and forming a low-resistance region of the second doping type adjoining the source region in the body region. Forming the source region includes implanting dopant particles of the first doping type using an implantation mask via a first surface of the semiconductor body into the body region. Implanting the doping particles of the first doping type includes a tilted implantation.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.