High voltage level shifter with short propagation delay
US10374606B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2019 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Jan 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0081
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A lever shifter includes an output driver and a high-side gate driver. The high-side gate driver is configured to drive the high-side output transistor, and is coupled to an on pulse signal line that conducts an on pulse, and is coupled to an off pulse signal line that conducts an off pulse. The high-side gate driver includes a blocking circuit configured to enable generation of a drive signal to the high-side output transistor based on a voltage of a first of the on or off pulse signal line being greater than a first predetermined amount and a voltage of a second of the on or off signal line being less than a second predetermined amount.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.