Routing methods, systems, and computer program products
US10374938B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 24, 2018 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Apr 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/22
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In one embodiment, an apparatus is provided, comprising: at least one non-transitory memory configured to store instructions; and one or more processors in communication with the at least one non-transitory memory, wherein the one or more processors is configured to execute the instructions to: receive a packet at a current node in a network path between a source node and a destination node, the network path including a path node between the current node and the destination node that is not the destination node and that is reachable by a plurality of path portions including a first path portion that includes multiple hops, and a second path portion; in response to the receipt of the packet at the current node, identify a header and data of the packet, the header including a segment identifier that identifies the path node that is not the destination node, where the destination node is outside a domain of a multiple protocol-labeling switch (MPLS) network protocol in accordance with which the path node operates and the segment identifier identifies the path node in the domain of the MPLS network protocol; detect the segment identifier that identifies the path node that is not the de…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.