Data transfer circuitry given multiple source elements
US10374981B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 2, 2016 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Apr 14, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/90
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An interface circuit is disclosed for the transfer of data from a synchronous circuit, with multiple source elements, to an asynchronous circuit. Data from the synchronous circuit is received into a memory in the interface circuit. The data in the memory is then sent to the asynchronous circuit based on an instruction in a circular buffer that is part of the interface circuit. Processing elements within the interface circuit execute instructions contained within the circular buffer. The circular buffer rotates to provide new instructions to the processing elements. Flow control paces the data from the synchronous circuit to the asynchronous circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.