Hologram anchor prioritization
US10379606B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2017 |
| Grant date | Aug 13, 2019 |
| Priority date | — |
| Expiry date | Jun 5, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B2027/0187
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A computing device is provided, including a display configured to display a plurality of holograms superimposed upon a physical environment. The computing device may further comprise a processor configured to store in non-volatile memory a representation of the physical environment, including a plurality of hologram anchors indicating locations at which the holograms are displayed. The processor may store a priority level of each hologram anchor, wherein each priority level is selected from a plurality of priority levels including a high priority level and a low priority level, and wherein at least one hologram anchor has the low priority level. The processor may determine that a total size of the plurality of hologram anchors exceeds a predetermined size threshold. The processor may, for at least one hologram anchor assigned the low priority level, delete that hologram anchor from the representation of the physical environment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.