Host managed solid state drivecaching using dynamic write acceleration
US10379782B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2017 |
| Grant date | Aug 13, 2019 |
| Priority date | — |
| Expiry date | Oct 31, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, apparatuses and methods may provide for technology that writes a block of data addressed within a host managed cache region into a set of multi-level non-volatile memory (NVM) cells organized into a dynamic single level cell buffer region, that writes a block of data addressed outside the host managed cache region into the set of multi-level NVM cells organized into a static single level cell buffer region, and automatically writes the contents of the static single level cell buffer region into the dynamic multi-level NVM media region. The host manage cache region comprises a set of dynamic single level NVM cells within the dynamic multi-level NVM media region, and the multi-level NVM cells are to be dynamically convertible into and from single NVM cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.