Semiconductor device with localized carrier lifetime reduction and fabrication method thereof
US10381259B2 · kind B2 · utility
0Cited by
7References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2017 |
| Grant date | Aug 13, 2019 |
| Priority date | — |
| Expiry date | Jul 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0179
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor structure includes forming an isolation feature in a substrate, removing a portion of the isolation feature and a portion of the substrate underneath the removed portion of the isolation feature to form a trench in the substrate, and forming a trapping feature around a bottom portion of the trench. A first sidewall and a second sidewall of the trench are in direct contact with the isolation feature, and a bottom surface of the trench is below a bottom surface of the isolation feature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.