Patent · US Active

Electrostatic protection device of LDMOS silicon controlled structure

US10381343B2 · kind B2 · utility

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1References
20Claims
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Key dates

Filing dateApr 29, 2016
Grant dateAug 13, 2019
Priority date
Expiry dateApr 29, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/151

Abstract

An electrostatic protection device of an LDMOS silicon controlled structure comprises a P-type substrate (310), an N-well (320) and a P-well (330) on the substrate, a gate electrode (340) overlapping on the P-well (330) and extending to an edge of the N-well (320), a first N+ structure and a first P+ structure provided in the N-well (320), and a second N+ structure and a second P+ structure provided in the P-well (330), the first N+ structure being a drain electrode N+ structure (322), the first N+ structure being a drain electrode N+ structure (322), the first P+ structure being a drain electrode P+ structure (324), the second N+ structure being a source electrode N+ structure (332), the second P+ structure being a source P+ structure (334), and a distance from the drain electrode P+ structure (324) to the gate electrode (340) being greater than a distance from the drain electrode N+ structure (322) to the gate electrode (340).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.