Dynamically configurable bias circuit for controlling gain expansion of multi-mode, single chain linear power amplifiers
US10381990B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 14, 2018 |
| Grant date | Aug 13, 2019 |
| Priority date | — |
| Expiry date | Feb 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G2201/40
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a preferred embodiment, the gain expansion in low power mode of a single chain PA is minimized by dynamically adjusting the output impedance of the bias circuit of each gain stage for each mode of operation. Instead of switching in a series attenuator or switching in additional feedback in the first gain stage of a single-chain PA to limit the gain at the increased quiescent current level, this embodiment achieves linear performance by adjusting the quiescent current in each stage to the minimum level that meets the target gain and then increasing the output resistance of the bias circuit of each gain stage in low power mode (LPM) to provide the appropriate level of negative feedback at the base of each amplifying HBT to linearize the gain versus power response.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.