High voltage level shifting (HVLS) circuit and related semiconductor devices
US10382040B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 20, 2018 |
| Grant date | Aug 13, 2019 |
| Priority date | — |
| Expiry date | Jul 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0185
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high voltage level shifting circuit and related semiconductor devices are presented. The circuit comprises: a level conversion circuit that converts an input signal with a first high voltage to an output signal with a second high voltage; a first switch having a first node connected to a first power source and a second node connected to a control node of a first transistor; a second switch having a first node connected to the control node of the first transistor and a second node connected to a first connection node; and a switch control circuit connected to the first switch and the second switch and controls them not to be close at the same time. By adding these two switches to the level conversion circuit, this inventive concept substantially lowers the static current generated during a high voltage level conversion process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.