Maintaining packet order in offload of packet processing functions
US10382350B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2017 |
| Grant date | Aug 13, 2019 |
| Priority date | — |
| Expiry date | Sep 12, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/9068
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Network interface apparatus includes a host interface and a network interface, which receives packets in multiple packet flows destined for one or more virtual machines running on a host processor. Packet processing circuitry receives a first instruction from the host processor to offload preprocessing of the data packets in a specified flow in accordance with a specified rule, and initiates preprocessing of the data packets while writing one or more initial data packets from the specified flow to a temporary buffer. Upon subsequently receiving a second instruction to enable the specified rule, the initial data packets are delivered from the temporary buffer, after preprocessing by the packet processing circuitry, directly to a virtual machine to which the specified flow is destined, followed by preprocessing and delivery of subsequent data packets in the specified flow to the virtual machine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.