Memory cell selector and method of operating memory cell
US10388371B2 · kind B2 · utility
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8Claims
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Key dates
| Filing date | Jan 26, 2016 |
| Grant date | Aug 20, 2019 |
| Priority date | — |
| Expiry date | Jan 26, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments provide a selector device for selecting a memory cell. The selector device includes a first electrode; a second electrode; and a switching layer sandwiched between the first electrode and the second electrode. The switching layer includes at least one metal rich layer and at least one chalcogenide rich layer. The metal rich layer includes at least one of a metal or a metal compound, wherein metal content of the metal rich layer is greater than 50 at. %. The chalcogenide content of the chalcogenide rich layer is greater than 50 at. %.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.