Array substrate, method for manufacturing the same and display device including the array substrate
US10388673B2 · kind B2 · utility
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Key dates
| Filing date | Apr 1, 2017 |
| Grant date | Aug 20, 2019 |
| Priority date | — |
| Expiry date | Apr 1, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136295
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate, a method for manufacturing the same and a display device are provided. The array substrate includes an insulating layer and a conductive structure in the non-display region. The insulating layer includes at least one aperture in the non-display region. The aperture has a one-to-one correspondence with the conductive structure. The conductive structure is within the aperture, and the surface of the conductive structure is lower than the surface of the insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.