Wafer level light-emitting diode array
US10388690B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2016 |
| Grant date | Aug 20, 2019 |
| Priority date | — |
| Expiry date | Jun 10, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H29/142
Abstract
A light emitting diode array is provide to include: a substrate; light emitting diodes positioned over the substrate, each including a first semiconductor layer, an active layer, and a second semiconductor layer, wherein each light emitting diode is disposed to form a first via hole structure exposing a portion of the corresponding first semiconductor layer; lower electrodes disposed over the second semiconductor layer; a first interlayer insulating layer disposed over the lower electrodes and configured to expose the portion of the first semiconductor layer of corresponding light emitting diodes; upper electrodes electrically connected to the first semiconductor layer through the first via hole structure, wherein the first via hole structure is disposed in parallel with one side of the corresponding second semiconductor layer and the first interlayer insulating layer is disposed to form a second via hole structure exposing a portion of the lower electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.