Electronic device package
US10388700B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2017 |
| Grant date | Aug 20, 2019 |
| Priority date | — |
| Expiry date | May 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/124
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device package includes a carrying board, an electronic device, a first insulating layer, and a barrier layer. The carrying board includes a central area, an inner edge area, and an outer edge area. The inner edge area is located between the central area and the outer edge area. The electronic device is located in the central area. The first insulating layer is located on the carrying board and overlapped with the electronic device and extends from the central area to the inner edge area. The barrier layer is located on the carrying board. Here, the barrier layer includes a sidewall contact portion and an extending portion. The sidewall contact portion surrounds a side surface of the first insulating layer, and the extending portion extends from the sidewall contact portion to the outer edge area in a direction away from the first insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.