One-time programmable bitcell with native anti-fuse
US10395745B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2017 |
| Grant date | Aug 27, 2019 |
| Priority date | — |
| Expiry date | Oct 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A one-time programmable memory device includes a well of a first polarity in a semiconductor substrate. A lightly-doped drain (LDD) region is above one portion of the well. The LDD region has a first doping concentration and a second polarity that is opposite the first polarity. A source region or a drain region of the second polarity is above another portion of the well. The source region or the drain region has a second doping concentration that is higher than the first doping concentration. A first breakdown voltage between the LDD region and the well region is higher than a second breakdown voltage between the source region or the drain region and the well region. A select device is positioned at least partially above a portion of the source region or the drain region. The select device is configured to form a channel between the source region or the drain region and the LDD region. An anti-fuse device is positioned at least partially above a portion of the LDD region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.