Magnetic memory device
US10396275B2 · kind B2 · utility
1Cited by
6References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2017 |
| Grant date | Aug 27, 2019 |
| Priority date | — |
| Expiry date | Aug 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magnetic tunnel junction pattern includes a first magnetic layer, a tunnel barrier layer, a second magnetic layer, and a non-magnetic capping layer that are sequentially stacked on a substrate. A top electrode is disposed on the magnetic tunnel junction pattern. A bit line is disposed on the top electrode. The top electrode comprises a metal nitride pattern in contact with the non-magnetic capping layer and a metal pattern disposed on the metal nitride pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.