Compensation memory (CM) for power application
US10396800B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2018 |
| Grant date | Aug 27, 2019 |
| Priority date | — |
| Expiry date | Oct 9, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1776
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory block integrated in a programmable logic device (PLD) is disclosed. The memory block includes: one or more lookup tables storing pre-populated data. The PLD includes a programmable fabric and a signal wrapper configured to provide signals between the memory block and the programmable fabric. The memory block is configured to receive input signals from the signal wrapper and generate output signals to the signal wrapper by looking up the pre-populated data corresponding to the input signals. The pre-populated data stored in the one or more lookup tables are programmably changed by programming a plurality of parameters of the programmable fabric and loading the pre-populated data to the one or more lookup tables via the signal wrapper.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.