Matrix switcher
US10397517B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2018 |
| Grant date | Aug 27, 2019 |
| Priority date | — |
| Expiry date | Jun 13, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/43635
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A matrix switcher is provided. A code rate of an ultra-high-definition video signal is reduced on the premise that the quality of the ultra-high-definition video signal is not affected through performing a Color Space Conversion (CSC) process and/or a Digital Stream Compression (DSC) process on the ultra-high-definition video signal at the transmitting side chip, thereby reducing a bandwidth required in conversion, switch and transmission of the ultra-high-definition video signal. A matrix switch chip with a low cost and general performance is used. Then, a corresponding DSC data decompression process and/or CSC process are performed at the receiving side to recover the performance of the ultra-high-definition video signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.