Display panel
US10401697B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2017 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Aug 9, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136227
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A display panel that includes a first light-shielding layer, a semiconductor layer, an insulating layer, and a gate line are successively on a substrate is provided. A contact hole passes through the insulating layer to expose the semiconductor layer. A metal layer is on the insulating layer and electrically connected to the semiconductor layer through the contact hole. The first light-shielding layer includes an overlapping region that overlaps with the metal layer and has a first width in a first direction. A minimum distance in the first direction between the edge of the metal layer adjacent to the gate line and the bottom of the contact hole is defined as a second width. The first direction is substantially perpendicular to an extending direction of the gate line, and a ratio of the first width to the second width is in a range between 0.2 and 0.8.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.