Channel optimized storage modules
US10402106B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 15, 2017 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Sep 15, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0688
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage module includes a set of memories. Each of the memories in the set of memories may be divided into a set of portions. A controller is configured to transfer data between the set of memories and a host connected through an interface. A set of channels connects the set of memories to the controller. The controller is also configured to select: a memory from the set of memories, a portion from the set of portions for the selected memory, and/or a channel from the set of channels, e.g., connected to the selected memory, based upon an identification (ID) associated with the data. The ID may be separate from the data and a write address of the data, and the selected memory, the selected portion, and the selected channel may be used to store the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.