Patent · US Active

Method for controlling error rate of device-specific information and program for controlling error rate of device-specific information

US10402248B2 · kind B2 · utility

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Key dates

Filing dateAug 20, 2015
Grant dateSep 3, 2019
Priority date
Expiry dateJan 10, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L9/32
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and a program capable of controlling an error rate of device-specific information are provided. Provided is the method for controlling an error rate of device-specific information, including a step S1 of: inputting each of i (i is an arbitrary natural number) challenges, j times (j is an arbitrary natural number), into a PUF mounted chip; leaving j responses intact (j′=j) or processing j responses into j′ pieces (0<j′<j); and registering them in the database beforehand in association with each piece of the input data, a step S2 of inputting i challenges into the database, a step S3 of: reading j′ responses corresponding to the respective i challenges from the database; concatenating the j′ responses for each piece of the input data; further concatenating the concatenated data by k′ repetitions (0<k′≤k, and k is an arbitrary natural number, but is a natural number of 2 or more if the i and the j are both 1); obtaining the concatenated (j′×k′) responses for each piece of the input data; and further concatenating them also for different input data to obtain concatenated (i×j′×k′) responses and thereby generate reference data, a step S4 of: inputting i challenges, k times, for…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.