Adaptive coherence for latency-bandwidth tradeoffs in emerging memory technologies
US10402330B2 · kind B2 · utility
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Key dates
| Filing date | Apr 3, 2018 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Apr 3, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Examples include a processor including a coherency mode indicating one of a directory-based cache coherence protocol and a snoop-based cache coherency protocol, and a caching agent to monitor a bandwidth of reading from and/or writing data to a memory coupled to the processor, to set the coherency mode to the snoop-based cache coherency protocol when the bandwidth exceeds a threshold, and to set the coherency mode to the directory-based cache coherency protocol when the bandwidth does not exceed the threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.