Module auto addressing in platform bus
US10402358B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2015 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Feb 8, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B2219/1215
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and approach for addressing modules on a platform bus that may incorporate a master module and one or more slave modules. The platform bus may run through sub-base connectors that interlock modules together on a rail. Addressing of the modules may occur automatically and dynamically in that the master module may have a first address by default, and a first slave module adjoining the master module may be assigned a second address. A second slave module adjoining the first slave module, if there is one, may be assigned a third address. Each of the other slave modules, adjoining a preceding slave module assigned an address, may be assigned a next address after an address assigned to a preceding slave module. Addresses may be assigned in a numerical order to each module based on a physical position of the respective module on a rail.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.