Tuple encoding aware direct memory access engine for scratchpad enabled multi-core processors
US10402425B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2018 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Jul 24, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/221
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques provide for hardware accelerated data movement between main memory and an on-chip data movement system that comprises multiple core processors that operate on the tabular data. The tabular data is moved to or from the scratch pad memories of the core processors. While the data is in-flight, the data may be manipulated by data manipulation operations. The data movement system includes multiple data movement engines, each dedicated to moving and transforming tabular data from main memory data to a subset of the core processors. Each data movement engine is coupled to an internal memory that stores data (e.g. a bit vector) that dictates how data manipulation operations are performed on tabular data moved from a main memory to the memories of a core processor, or to and from other memories. The internal memory of each data movement engine is private to the data movement engine. Tabular data is efficiently copied between internal memories of the data movement system via a copy ring that is coupled to the internal memories of the data movement system and/or is coupled to a data movement engine. Also, a data movement engine internally broadcasts data to other data movement engi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.