Patent · US Active

Method and system for adapting solid state memory write parameters to satisfy performance goals based on degree of read errors

US10403366B1 · kind B1 · utility

4Cited by
29References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 28, 2017
Grant dateSep 3, 2019
Priority date
Expiry dateApr 28, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2211/5621
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In general, embodiments of the technology relate to a method for adjusting solid state memory write parameters. The method includes obtaining a performance goal for the solid state memory, receiving a client write request for data from a client, where the client write request comprises a logical address and data to be written. The method further includes determining a physical address corresponding to the logical address, where the physical address comprises a page number for a physical page in the persistent storage, obtaining at least one verify threshold value using the performance goal, issuing a control module program request including the data to be written and the at least one verify threshold value to a storage module, where the storage module comprises the physical page, and programming the data into the physical page of the storage module using the at least one verify threshold value.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.