Patent · US Active

Method to form hybrid SiGe fin

US10403546B2 · kind B2 · utility

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1References
16Claims
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Key dates

Filing dateMar 19, 2018
Grant dateSep 3, 2019
Priority date
Expiry dateMar 19, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/834

Abstract

A method for manufacturing a semiconductor device includes providing a semiconductor structure having a semiconductor substrate, a dielectric layer on the semiconductor substrate, and a hardmask on a second portion of the dielectric layer while exposing a first portion of the dielectric layer; forming a copolymer on the semiconductor structure; performing an annealing treatment such that the copolymer forms a staggered configuration of a first monomer and a second monomer; removing the first monomer; performing a first etching process on the first portion using the second monomer as a mask to form a first trench extending to the semiconductor substrate; removing the second monomer and the first hardmask; and epitaxially growing a first semiconductor fin in the first trench.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.