Semiconductor device manufacturing method
US10403676B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2016 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Mar 31, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F77/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes a first process in which a first wiring is provided on a surface of a semiconductor substrate; a second process in which a light transmitting substrate is attached to the surface; a third process in which the semiconductor substrate is thinned so that the thickness of the semiconductor substrate is smaller than the thickness of the light transmitting substrate; a fourth process in which a through hole is formed in the semiconductor substrate; a fifth process in which a dip coating method is performed using a resin material and thus a resin insulating layer is provided; a sixth process in which a contact hole is formed in the resin insulating layer; and a seventh process in which a second wiring is provided on a surface of the resin insulating layer, and the first wiring and the second wiring are electrically connected via a contact hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.