Configurable low memory modes for reduced power consumption
US10409513B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2017 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | May 23, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Certain aspects of the present disclosure provide apparatus and techniques for configuring memory in an effort to reduce power consumption. For example, certain aspects of the present disclosure may provide an apparatus having a processing system configured to determine an operating mode of an application executing on the processing system. The operating mode may be one of a plurality of operating modes of the application, and each operating mode of the plurality of operating modes may correspond to a different configuration of memory. In certain aspects, the configurations of memory may correspond to different portions of memory that are active or inactive. In certain aspects, the apparatus may also include a memory control module configured to configure the memory based on the determined operating mode of the application.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.