Debugging method, multi-core processor and debugging device
US10409709B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2018 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Mar 23, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3698
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention relate to the field of computer technologies. The embodiments of the present invention provide a debugging method, including: starting, by a core A of a multi-core processor after completing execution of a preset event processing routine, to stop running, and sending a running stop signal to other cores in a process of stopping running; after receiving a first stop termination instruction and resuming running, executing a debugging information collection function to collect debugging information of the preset event, and stopping running after completing the execution of the debugging information collection function; and after receiving a second stop termination instruction and resuming running, sending a running resumption instruction to the other cores. By means of the technical solutions provided in the embodiments of the present invention, kernel mode code and user mode code can be masked on a same debugging platform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.