Memory controller, nonvolatile memory system, and operating method thereof
US10409715B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2017 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Jun 27, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7207
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an operating method of a memory controller, the memory controller includes a logical-to-logical (L2L) mapping table including mapping information between a first logical area and a second logical area and a logical-to-physical (L2P) mapping table including mapping information between the second logical area and a physical area of a memory device. The operating method includes receiving a first logical address of the first logical area and a first command for changing the L2L mapping table to access first data stored in the memory device through the first logical address, detecting a second logical address of the second logical area mapped to a physical address of the physical area in which the first data is stored, in response to the first command, and changing the L2L mapping table to map the first logical address to the second logical address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.