Combination storage and processing device
US10409764B2 · kind B2 · utility
Inventor
Key dates
| Filing date | Nov 27, 2017 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Nov 27, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A combination storage and processing device is disclosed. A large scale integrated circuit which incorporates both random access memory storage for individual data elements and circuits which process data elements according to a fixed set of instructions is disclosed. When directed by controlling software or hardware, a plurality of the individual data elements stored in the random access memory storage are pushed through the circuits which perform fixed operations upon the data elements and return them to random access memory storage. This allows operations to be performed on the plurality of data elements without sending them through a data bus to the central processing unit of a general purpose computing device, increasing efficiency and overall computing speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.