Systems and methods for reducing memory bandwidth using low quality tiles
US10410398B2 · kind B2 · utility
1Cited by
55References
20Claims
0Family size
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Key dates
| Filing date | Feb 20, 2015 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Dec 6, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2370/027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are disclosed for displaying data on a display device. An example method of displaying data on a display device includes computing a texture based on a difference between a high quality (HQ) tile and a corresponding low quality (LQ) tile. The method also includes storing the texture into an alpha channel of the LQ tile. The method further includes compositing the LQ tile onto the display device when an attribute of the alpha channel satisfies a threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.