Reference-free multi-level sensing circuit for computing-in-memory applications, reference-free memory unit for computing-in-memory applications and sensing method thereof
US10410690B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2018 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Aug 22, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/56
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reference-free multi-level sensing circuit for computing-in-memory applications is controlled by a first bit line and a second bit line. An encoding unit generates a first register output value and a plurality of encoded values. The first register output value feedback controls a precharging unit so as to enable the precharging unit to precharge one of the first bit line and the second bit line according to the first register output value. A voltage level of the one of the first bit line and the second bit line is lower than a voltage level of the other one of the first bit line and the second bit line. The encoded values and the first register output value are formed a multi-bit signal to estimate voltage levels of the first bit line and the second bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.