Crossbar arrays for calculating matrix multiplication
US10410716B2 · kind B2 · utility
1Cited by
5References
13Claims
0Family size
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Key dates
| Filing date | Sep 25, 2015 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Oct 11, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A crossbar array, comprises a plurality of row lines, a plurality of column lines intersecting the plurality of row lines at a plurality of intersections, a plurality of junctions coupled between the plurality of row lines and the plurality of column lines at a portion of the plurality of intersections, and a plurality of diagonal control lines coupled to the plurality of junctions. Each junction comprises a resistive memory element and a transistor, and the junctions are positioned to calculate a matrix multiplication of a first matrix and a second matrix.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.