Semiconductor device
US10410916B2 · kind B2 · utility
4Cited by
11References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2018 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Aug 21, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes an interlayer insulation layer on a semiconductor substrate, a via plug and a wiring line on the via plug, in the interlayer insulation layer, the via plug and the wiring line coupled with each other and forming a stepped structure. The semiconductor device includes a first air-gap region between the interlayer insulation layer and the via plug, and a second air-gap region between the interlayer insulation layer and the wiring line. The first air-gap region and the second air-gap region are not vertically overlapped with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.