Flip-flop including 3-state inverter
US10411677B2 · kind B2 · utility
2Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2017 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Jul 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/001
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A flip-flop includes an input interface, a first latch, a third inverter, and a second latch. The third inverter and the fifth inverter include first transistors of a first type formed between a first power contact and a second power contact supplied with a power supply voltage on first-type fins, and second transistors of a second type formed between a first ground contact and a second ground contact supplied with a ground voltage on second-type fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.