Solid state switch system
US10411694B2 · kind B2 · utility
5Cited by
8References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2016 |
| Grant date | Sep 10, 2019 |
| Priority date | — |
| Expiry date | Apr 12, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0036
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A solid state switch has at least one FET-type device and at least one thyristor-type device coupled in parallel to the at least one FET-type device. The at least one FET-type device is constructed with a first power loss profile based on a rated current of an electrical device; and the at least one thyristor-type device is constructed with a second power loss profile based on a surge current associated with the electrical device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.